Slovenian researchers, experts in the superconductor materials, have developed a memory device for superconducting computing that combines a switchable resistive element with a superconductor element to control the switching between the memory states. The device is highly scalable.
Partners are sought for technical and/or research cooperation agreements.
The researchers from Slovenian public research organization encompassing a variety of research fields including superconductors and nanowires have developed a memory device suitable for superconducting computers.
Developing a superconducting computer that could outperform conventional computers with high speed and low power consumption has been a desirable goal for a long time. One of the remaining obstacles still is the development of a fast, scalable, low power memory. An example of a known proposal for a memory solution is a superconducting-nanowire memory element operated by nanowire cryotrons. Various hybrid devices also have been developed in the past. Here, a memory device that combines a switchable resistive element, with a superconductor element to control the switching, is proposed.
The offered memory device consists of a narrow channel made of a memristive non-volatile charge density wave (CDW) material.
The memristive non-volatile CDW material may be referred to as a switchable resistive element. The normal state after cooling down to cryogenic temperature is high resistance state. Above a certain current threshold, the resistive element is caused to undergo a transition to the low resistance state which constitutes the Write operation. The reverse transition from the low resistance state to the high resistance state of the memristive element (the Erase operation) is caused when the current exceeds a certain but different value of critical current, changing the shunt resistance to a high value.
The superconducting memory device described may be in the form of a nanowire or a three-terminal device such as nano-cryotron (nTron) device. The suitable device operating temperature is 40 K or lower. The width of the device is few tens of nm enabling high scalability.
The proof of concept for the memory device proposed would be the first step of cooperation.
The technical cooperation is sought for the development of the prototype device.
The research cooperation agreement is sought for creating a partnership and further research toward a fully functional memory chip. The partner would need to provide a technology for designing, testing and manufacturing of the superconductor-based integrated circuits.
- Specific area of activity of the partner: The institute is seeking an industrial partner for:
• Technical cooperation agreement - to provide technical cooperation for the development of the fully functioning memory chip
• Research cooperation agreements – to provide a technology for designing, testing and manufacturing of the superconductor-based integrated circuits.
A hybrid superconducting memory device proposed combines a superconductor element in parallel with a switchable resistive element. The proposed device is characterized by:
• ultrafast switching speed <40 ps,
• two- or three-terminal operation,
• scalability, ultralow switching energy (due to the ability to use low-energy memristive elements) <0.25 pJ/bit,
• low-temperature operation,
• ease of integration, simple 2-element circuit design and compatibility with superconducting electronics, particularly superconducting flux-quantum electronics.
Concept stage - The technological strategy would be: • To confirm the theoretical scaling of energy per bit with feature size and identify the technological challenges for achieving the lowest theoretical energy per bit limit. • To investigate compatibility with single flux quanta (SFQ) technology • To demonstrate the operation of the proposed device driven by rapid single flux quantum (RSFQ) logic.
Patent(s) applied for but not yet granted,Patents granted - Two patents on device principles (optical and electrical switching respectively) are currently pending approval at UK and EU patent offices. Two US patents have been granted and two in Slovenia.